Web Date: December 23, 2014
Record-Breaking Nanowire Transistors
For decades, computer chip manufacturers have been shrinking silicon transistors to increase the computing power of their chips. The tiniest silicon transistors in production today are just 14 nm wide. But the march of miniaturization may come to an end within the next decade.
To push past that limit, researchers are working on transistor designs that rely on materials with better electrical properties than silicon. Now researchers have made high-performance transistors from a promising candidate material: gallium arsenide nanowires (Nano Lett. 2014, DOI: 10.1021/nl503596j).
GaAs is a III/V semiconductor—each member of the family contains an element from the third and fifth columns of the periodic table. These materials have higher charge mobility than silicon, which should allow III/V transistors to switch on and off faster than silicon-based devices.
One challenge is cost. GaAs wafers are much more expensive and far smaller than silicon wafers, meaning manufacturers wouldn’t be able to make as many chips at once as they do with silicon to keep chip costs down. Nanowires offer a way around the wafer problem, because they should use less material.
However, nanowires like to grow vertically, out of the plane of the substrate, making it tricky to pattern electrical contacts on top, says Xiuling Li, an electrical engineer at the University of Illinois, Urbana-Champaign. So when one of Li’s students let her know that some of the GaAs nanowires in their batches had grown horizontally along the surface of a wafer, Li saw it as an opportunity rather than a problem.
She and her group first published a reliable method for growing planar arrays of GaAs nanowires in 2008 (Nano Lett., DOI: 10.1021/nl802331m), and in 2013 they described a method for achieving nearly 100% yields of parallel, planar nanowires (Nano Lett., DOI: 10.1021/nl400620f). The growth of the wires is catalyzed by spots of gold, patterned in a tight line by electron-beam lithography onto a surface. As the chamber fills with gaseous precursors, the gold spots catalyze the deposition of solid GaAs. By carefully controlling the ratio of gallium and arsenide, and conditions such as temperature and pressure, Li’s team can ensure that the gold catalyst moves along the surface as the nanowire grows, rather than leaving the surface and forming the nanowires vertically.
Now Li has used the nanowire arrays to make a type of high-performance transistor similar to those found in radar equipment and cell-phones. Each 10-µm-wide transistor contains about 30 nanowires, along with three electrodes. A top electrode called a gate applies a voltage across the device to switch the nanowires between conducting, or “on,” and insulating, or “off,” states. In the on state, charges flow between source and drain electrodes. The transistors have blistering switching speeds, turning on and off 75 billion times a second, or at 75 gigahertz. The previous record for planar nanowire transistors was 1.8 GHz.
“The performance of this device is really exceptional,” says Chennupati Jagadish, an electronic materials engineer at the Australian National University. He points out that the team grows the nanowires on GaAs wafers, so they’ll need to adapt the method to larger, less expensive silicon wafers.
Li agrees that her team still has a lot of work to do. She wants to adapt the method to indium arsenide, another III/V material. “The mobility of indium arsenide is three times higher than gallium arsenide, so if I can make it work, I think we can get to terahertz speeds,” she says.
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