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High-Performance Flexible Circuits By The Slice

Electronics: A new method to produce flexible integrated circuits from silicon wafers requires little new equipment or materials

by Katherine Bourzac
October 31, 2012

Circuit Slice
Credit: Nano Lett.
Researchers produced this thin, flexible integrated circuit by slicing it from a silicon wafer.
Credit: Nano Lett.
Researchers produced this thin, flexible integrated circuit by slicing it from a silicon wafer.

If they had flexible integrated circuits readily at hand, electronics manufacturers could start producing new devices including smart medical implants and flexible displays. Now researchers have demonstrated a way to make high performance, flexible integrated circuits using almost exclusively standard equipment and materials already needed to make conventional chips (Nano Lett., DOI: 10.1021/nl302735f).

To make circuits that bend, some researchers previously have worked with new materials such as semiconducting polymers or inorganic nanowires. Meanwhile, other teams have tried new ways to work with traditional polycrystalline silicon, or have tried depositing a different form of silicon on plastic substrates. Although many of these approaches produced circuits with good performance, they all required retooling the manufacturing process to make conventional electronics.

Sanjay Banerjee, an electrical engineer at the University of Texas, Austin, wanted to make flexible circuits without many changes to existing protocols. He says that sticking with existing equipment and materials would keep manufacturing costs down.

Banerjee and his colleagues decided to slice the top off of conventional silicon wafers to produce thin, bendable circuits. They started by patterning integrated circuits on 200-mm-diameter silicon wafers using a conventional production line operated at SVTC, a nanotechnology research and development company in Austin. The wafers were about 600 to 700 µm thick. The team wanted to take a few tens of micrometers off the top, leaving the rest intact.

They did so by electroplating the patterned wafer with a 50- to 100-µm-thick layer of nickel, and then heating the wafer up to about 100 ºC. As the wafer heated, silicon and nickel expanded at different rates, putting stress on the silicon. As a result, the silicon wafer cracked at its edges about 20 to 30 µm below the top of the wafer. The researchers used a thin wire to extend this crack through the wafer, a process Banerjee likens to slicing a block of cheese. They then removed the nickel, leaving behind a thin, flexible platter of circuits that they cut up into 20-to-30-µm-thick chips.

Manufacturers already make thin silicon circuits to serve as layers in three-dimensional chips. These chips stack up more computing power in a given area, but are not flexible. To prepare those chips, they chemically etch away the wafer, wasting expensive polycrystalline silicon. Banerjee points out that his method saves silicon by leaving behind a silicon wafer that can be reused to make more flexible circuits.

The main advantage of Banerjee’s process is that they used standard equipment found in semiconductor production lines, says John A. Rogers, a materials scientist at the University of Illinois, Urbana-Champaign. One limitation of the method, he says, is that the researchers don’t have precise control over the depth of the silicon cracks. So producing very thin circuits could be tricky, he says.

Banerjee agrees and is working on achieving better control of the thickness and the ability to make thinner slices.



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