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IBM researchers unveil first 5-nm chip

The breakthrough could help pave the way for cognitive computing and more efficient cell phones

by Alex H. Tullo
June 7, 2017 | A version of this story appeared in Volume 95, Issue 24

IBM researchert Nicolas Loubet holds a wafer with 5nm transistors.
Credit: IBM
IBM researcher Nicolas Loubet holds a wafer with 5-nm transistors.

An IBM-led research team has demonstrated a fabrication process that makes semiconductor chips featuring 5-nm transistors.

Current state-of-the-art chips on the market have 10-nm transistors. An IBM team demonstrated 7-nm chips less than two years ago.

The research team constructed the chips with stacks of silicon nanosheets. The method is an alternative to the current FinFET three-dimensional transistor architecture for cramming circuitry onto chips. Semiconductor makers will continue to use FinFET when they begin manufacturing 7-nm chips next year, but they have been looking for a new method to push into even smaller sizes.

To make the chips, the researchers also used extreme ultraviolet (EUV) lithography, which allows for the continuous adjustment of the nanosheet width and the fine tuning of circuit performance, IBM says. EUV is also being used on 7-nm chips.

“For business and society to meet the demand of cognitive and cloud computing in the coming years, advancement in semiconductor technology is essential,” says Arvind Krishna, director of IBM research. IBM says because chips made using the technology need less power for the same processing capacity, the breakthrough could also allow for cellphones that can go two to three times as long between charges.

To conduct the research, IBM partnered with Samsung and chipmaker GlobalFoundaries. They were working out of the State University of New York Polytechnic Institute Colleges of Nanoscale Science & Engineering’s NanoTech Complex in Albany, N.Y.

IBM says that chips made using the technology will be available in “the next few years.”


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